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00027 #include "libavutil/cpu.h"
00028 #include "libavutil/x86_cpu.h"
00029 #include "libavcodec/dsputil.h"
00030 #include "dsputil_mmx.h"
00031
00032 #define OP_PUT(S,D)
00033 #define OP_AVG(S,D) "pavgb " #S ", " #D " \n\t"
00034
00036 #define NORMALIZE_MMX(SHIFT) \
00037 "paddw %%mm7, %%mm3 \n\t" \
00038 "paddw %%mm7, %%mm4 \n\t" \
00039 "psraw "SHIFT", %%mm3 \n\t" \
00040 "psraw "SHIFT", %%mm4 \n\t"
00041
00042 #define TRANSFER_DO_PACK(OP) \
00043 "packuswb %%mm4, %%mm3 \n\t" \
00044 OP((%2), %%mm3) \
00045 "movq %%mm3, (%2) \n\t"
00046
00047 #define TRANSFER_DONT_PACK(OP) \
00048 OP(0(%2), %%mm3) \
00049 OP(8(%2), %%mm4) \
00050 "movq %%mm3, 0(%2) \n\t" \
00051 "movq %%mm4, 8(%2) \n\t"
00052
00054 #define DO_UNPACK(reg) "punpcklbw %%mm0, " reg "\n\t"
00055 #define DONT_UNPACK(reg)
00056
00058 #define LOAD_ROUNDER_MMX(ROUND) \
00059 "movd "ROUND", %%mm7 \n\t" \
00060 "punpcklwd %%mm7, %%mm7 \n\t" \
00061 "punpckldq %%mm7, %%mm7 \n\t"
00062
00063 #define SHIFT2_LINE(OFF, R0,R1,R2,R3) \
00064 "paddw %%mm"#R2", %%mm"#R1" \n\t" \
00065 "movd (%0,%3), %%mm"#R0" \n\t" \
00066 "pmullw %%mm6, %%mm"#R1" \n\t" \
00067 "punpcklbw %%mm0, %%mm"#R0" \n\t" \
00068 "movd (%0,%2), %%mm"#R3" \n\t" \
00069 "psubw %%mm"#R0", %%mm"#R1" \n\t" \
00070 "punpcklbw %%mm0, %%mm"#R3" \n\t" \
00071 "paddw %%mm7, %%mm"#R1" \n\t" \
00072 "psubw %%mm"#R3", %%mm"#R1" \n\t" \
00073 "psraw %4, %%mm"#R1" \n\t" \
00074 "movq %%mm"#R1", "#OFF"(%1) \n\t" \
00075 "add %2, %0 \n\t"
00076
00078 static void vc1_put_ver_16b_shift2_mmx(int16_t *dst,
00079 const uint8_t *src, x86_reg stride,
00080 int rnd, int64_t shift)
00081 {
00082 __asm__ volatile(
00083 "mov $3, %%"REG_c" \n\t"
00084 LOAD_ROUNDER_MMX("%5")
00085 "movq "MANGLE(ff_pw_9)", %%mm6 \n\t"
00086 "1: \n\t"
00087 "movd (%0), %%mm2 \n\t"
00088 "add %2, %0 \n\t"
00089 "movd (%0), %%mm3 \n\t"
00090 "punpcklbw %%mm0, %%mm2 \n\t"
00091 "punpcklbw %%mm0, %%mm3 \n\t"
00092 SHIFT2_LINE( 0, 1, 2, 3, 4)
00093 SHIFT2_LINE( 24, 2, 3, 4, 1)
00094 SHIFT2_LINE( 48, 3, 4, 1, 2)
00095 SHIFT2_LINE( 72, 4, 1, 2, 3)
00096 SHIFT2_LINE( 96, 1, 2, 3, 4)
00097 SHIFT2_LINE(120, 2, 3, 4, 1)
00098 SHIFT2_LINE(144, 3, 4, 1, 2)
00099 SHIFT2_LINE(168, 4, 1, 2, 3)
00100 "sub %6, %0 \n\t"
00101 "add $8, %1 \n\t"
00102 "dec %%"REG_c" \n\t"
00103 "jnz 1b \n\t"
00104 : "+r"(src), "+r"(dst)
00105 : "r"(stride), "r"(-2*stride),
00106 "m"(shift), "m"(rnd), "r"(9*stride-4)
00107 : "%"REG_c, "memory"
00108 );
00109 }
00110
00115 #define VC1_HOR_16b_SHIFT2(OP, OPNAME)\
00116 static void OPNAME ## vc1_hor_16b_shift2_mmx(uint8_t *dst, x86_reg stride,\
00117 const int16_t *src, int rnd)\
00118 {\
00119 int h = 8;\
00120 \
00121 src -= 1;\
00122 rnd -= (-1+9+9-1)*1024; \
00123 __asm__ volatile(\
00124 LOAD_ROUNDER_MMX("%4")\
00125 "movq "MANGLE(ff_pw_128)", %%mm6\n\t"\
00126 "movq "MANGLE(ff_pw_9)", %%mm5 \n\t"\
00127 "1: \n\t"\
00128 "movq 2*0+0(%1), %%mm1 \n\t"\
00129 "movq 2*0+8(%1), %%mm2 \n\t"\
00130 "movq 2*1+0(%1), %%mm3 \n\t"\
00131 "movq 2*1+8(%1), %%mm4 \n\t"\
00132 "paddw 2*3+0(%1), %%mm1 \n\t"\
00133 "paddw 2*3+8(%1), %%mm2 \n\t"\
00134 "paddw 2*2+0(%1), %%mm3 \n\t"\
00135 "paddw 2*2+8(%1), %%mm4 \n\t"\
00136 "pmullw %%mm5, %%mm3 \n\t"\
00137 "pmullw %%mm5, %%mm4 \n\t"\
00138 "psubw %%mm1, %%mm3 \n\t"\
00139 "psubw %%mm2, %%mm4 \n\t"\
00140 NORMALIZE_MMX("$7")\
00141 \
00142 "paddw %%mm6, %%mm3 \n\t"\
00143 "paddw %%mm6, %%mm4 \n\t"\
00144 TRANSFER_DO_PACK(OP)\
00145 "add $24, %1 \n\t"\
00146 "add %3, %2 \n\t"\
00147 "decl %0 \n\t"\
00148 "jnz 1b \n\t"\
00149 : "+r"(h), "+r" (src), "+r" (dst)\
00150 : "r"(stride), "m"(rnd)\
00151 : "memory"\
00152 );\
00153 }
00154
00155 VC1_HOR_16b_SHIFT2(OP_PUT, put_)
00156 VC1_HOR_16b_SHIFT2(OP_AVG, avg_)
00157
00158
00163 #define VC1_SHIFT2(OP, OPNAME)\
00164 static void OPNAME ## vc1_shift2_mmx(uint8_t *dst, const uint8_t *src,\
00165 x86_reg stride, int rnd, x86_reg offset)\
00166 {\
00167 rnd = 8-rnd;\
00168 __asm__ volatile(\
00169 "mov $8, %%"REG_c" \n\t"\
00170 LOAD_ROUNDER_MMX("%5")\
00171 "movq "MANGLE(ff_pw_9)", %%mm6\n\t"\
00172 "1: \n\t"\
00173 "movd 0(%0 ), %%mm3 \n\t"\
00174 "movd 4(%0 ), %%mm4 \n\t"\
00175 "movd 0(%0,%2), %%mm1 \n\t"\
00176 "movd 4(%0,%2), %%mm2 \n\t"\
00177 "add %2, %0 \n\t"\
00178 "punpcklbw %%mm0, %%mm3 \n\t"\
00179 "punpcklbw %%mm0, %%mm4 \n\t"\
00180 "punpcklbw %%mm0, %%mm1 \n\t"\
00181 "punpcklbw %%mm0, %%mm2 \n\t"\
00182 "paddw %%mm1, %%mm3 \n\t"\
00183 "paddw %%mm2, %%mm4 \n\t"\
00184 "movd 0(%0,%3), %%mm1 \n\t"\
00185 "movd 4(%0,%3), %%mm2 \n\t"\
00186 "pmullw %%mm6, %%mm3 \n\t" \
00187 "pmullw %%mm6, %%mm4 \n\t" \
00188 "punpcklbw %%mm0, %%mm1 \n\t"\
00189 "punpcklbw %%mm0, %%mm2 \n\t"\
00190 "psubw %%mm1, %%mm3 \n\t" \
00191 "psubw %%mm2, %%mm4 \n\t" \
00192 "movd 0(%0,%2), %%mm1 \n\t"\
00193 "movd 4(%0,%2), %%mm2 \n\t"\
00194 "punpcklbw %%mm0, %%mm1 \n\t"\
00195 "punpcklbw %%mm0, %%mm2 \n\t"\
00196 "psubw %%mm1, %%mm3 \n\t" \
00197 "psubw %%mm2, %%mm4 \n\t" \
00198 NORMALIZE_MMX("$4")\
00199 "packuswb %%mm4, %%mm3 \n\t"\
00200 OP((%1), %%mm3)\
00201 "movq %%mm3, (%1) \n\t"\
00202 "add %6, %0 \n\t"\
00203 "add %4, %1 \n\t"\
00204 "dec %%"REG_c" \n\t"\
00205 "jnz 1b \n\t"\
00206 : "+r"(src), "+r"(dst)\
00207 : "r"(offset), "r"(-2*offset), "g"(stride), "m"(rnd),\
00208 "g"(stride-offset)\
00209 : "%"REG_c, "memory"\
00210 );\
00211 }
00212
00213 VC1_SHIFT2(OP_PUT, put_)
00214 VC1_SHIFT2(OP_AVG, avg_)
00215
00226 #define MSPEL_FILTER13_CORE(UNPACK, MOVQ, A1, A2, A3, A4) \
00227 MOVQ "*0+"A1", %%mm1 \n\t" \
00228 MOVQ "*4+"A1", %%mm2 \n\t" \
00229 UNPACK("%%mm1") \
00230 UNPACK("%%mm2") \
00231 "pmullw "MANGLE(ff_pw_3)", %%mm1\n\t" \
00232 "pmullw "MANGLE(ff_pw_3)", %%mm2\n\t" \
00233 MOVQ "*0+"A2", %%mm3 \n\t" \
00234 MOVQ "*4+"A2", %%mm4 \n\t" \
00235 UNPACK("%%mm3") \
00236 UNPACK("%%mm4") \
00237 "pmullw %%mm6, %%mm3 \n\t" \
00238 "pmullw %%mm6, %%mm4 \n\t" \
00239 "psubw %%mm1, %%mm3 \n\t" \
00240 "psubw %%mm2, %%mm4 \n\t" \
00241 MOVQ "*0+"A4", %%mm1 \n\t" \
00242 MOVQ "*4+"A4", %%mm2 \n\t" \
00243 UNPACK("%%mm1") \
00244 UNPACK("%%mm2") \
00245 "psllw $2, %%mm1 \n\t" \
00246 "psllw $2, %%mm2 \n\t" \
00247 "psubw %%mm1, %%mm3 \n\t" \
00248 "psubw %%mm2, %%mm4 \n\t" \
00249 MOVQ "*0+"A3", %%mm1 \n\t" \
00250 MOVQ "*4+"A3", %%mm2 \n\t" \
00251 UNPACK("%%mm1") \
00252 UNPACK("%%mm2") \
00253 "pmullw %%mm5, %%mm1 \n\t" \
00254 "pmullw %%mm5, %%mm2 \n\t" \
00255 "paddw %%mm1, %%mm3 \n\t" \
00256 "paddw %%mm2, %%mm4 \n\t"
00257
00266 #define MSPEL_FILTER13_VER_16B(NAME, A1, A2, A3, A4) \
00267 static void \
00268 vc1_put_ver_16b_ ## NAME ## _mmx(int16_t *dst, const uint8_t *src, \
00269 x86_reg src_stride, \
00270 int rnd, int64_t shift) \
00271 { \
00272 int h = 8; \
00273 src -= src_stride; \
00274 __asm__ volatile( \
00275 LOAD_ROUNDER_MMX("%5") \
00276 "movq "MANGLE(ff_pw_53)", %%mm5\n\t" \
00277 "movq "MANGLE(ff_pw_18)", %%mm6\n\t" \
00278 ASMALIGN(3) \
00279 "1: \n\t" \
00280 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00281 NORMALIZE_MMX("%6") \
00282 TRANSFER_DONT_PACK(OP_PUT) \
00283 \
00284 "movd 8+"A1", %%mm1 \n\t" \
00285 DO_UNPACK("%%mm1") \
00286 "movq %%mm1, %%mm3 \n\t" \
00287 "paddw %%mm1, %%mm1 \n\t" \
00288 "paddw %%mm3, %%mm1 \n\t" \
00289 "movd 8+"A2", %%mm3 \n\t" \
00290 DO_UNPACK("%%mm3") \
00291 "pmullw %%mm6, %%mm3 \n\t" \
00292 "psubw %%mm1, %%mm3 \n\t" \
00293 "movd 8+"A3", %%mm1 \n\t" \
00294 DO_UNPACK("%%mm1") \
00295 "pmullw %%mm5, %%mm1 \n\t" \
00296 "paddw %%mm1, %%mm3 \n\t" \
00297 "movd 8+"A4", %%mm1 \n\t" \
00298 DO_UNPACK("%%mm1") \
00299 "psllw $2, %%mm1 \n\t" \
00300 "psubw %%mm1, %%mm3 \n\t" \
00301 "paddw %%mm7, %%mm3 \n\t" \
00302 "psraw %6, %%mm3 \n\t" \
00303 "movq %%mm3, 16(%2) \n\t" \
00304 "add %3, %1 \n\t" \
00305 "add $24, %2 \n\t" \
00306 "decl %0 \n\t" \
00307 "jnz 1b \n\t" \
00308 : "+r"(h), "+r" (src), "+r" (dst) \
00309 : "r"(src_stride), "r"(3*src_stride), \
00310 "m"(rnd), "m"(shift) \
00311 : "memory" \
00312 ); \
00313 }
00314
00322 #define MSPEL_FILTER13_HOR_16B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00323 static void \
00324 OPNAME ## vc1_hor_16b_ ## NAME ## _mmx(uint8_t *dst, x86_reg stride, \
00325 const int16_t *src, int rnd) \
00326 { \
00327 int h = 8; \
00328 src -= 1; \
00329 rnd -= (-4+58+13-3)*256; \
00330 __asm__ volatile( \
00331 LOAD_ROUNDER_MMX("%4") \
00332 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00333 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00334 ASMALIGN(3) \
00335 "1: \n\t" \
00336 MSPEL_FILTER13_CORE(DONT_UNPACK, "movq 2", A1, A2, A3, A4) \
00337 NORMALIZE_MMX("$7") \
00338 \
00339 "paddw "MANGLE(ff_pw_128)", %%mm3 \n\t" \
00340 "paddw "MANGLE(ff_pw_128)", %%mm4 \n\t" \
00341 TRANSFER_DO_PACK(OP) \
00342 "add $24, %1 \n\t" \
00343 "add %3, %2 \n\t" \
00344 "decl %0 \n\t" \
00345 "jnz 1b \n\t" \
00346 : "+r"(h), "+r" (src), "+r" (dst) \
00347 : "r"(stride), "m"(rnd) \
00348 : "memory" \
00349 ); \
00350 }
00351
00360 #define MSPEL_FILTER13_8B(NAME, A1, A2, A3, A4, OP, OPNAME) \
00361 static void \
00362 OPNAME ## vc1_## NAME ## _mmx(uint8_t *dst, const uint8_t *src, \
00363 x86_reg stride, int rnd, x86_reg offset) \
00364 { \
00365 int h = 8; \
00366 src -= offset; \
00367 rnd = 32-rnd; \
00368 __asm__ volatile ( \
00369 LOAD_ROUNDER_MMX("%6") \
00370 "movq "MANGLE(ff_pw_53)", %%mm5 \n\t" \
00371 "movq "MANGLE(ff_pw_18)", %%mm6 \n\t" \
00372 ASMALIGN(3) \
00373 "1: \n\t" \
00374 MSPEL_FILTER13_CORE(DO_UNPACK, "movd 1", A1, A2, A3, A4) \
00375 NORMALIZE_MMX("$6") \
00376 TRANSFER_DO_PACK(OP) \
00377 "add %5, %1 \n\t" \
00378 "add %5, %2 \n\t" \
00379 "decl %0 \n\t" \
00380 "jnz 1b \n\t" \
00381 : "+r"(h), "+r" (src), "+r" (dst) \
00382 : "r"(offset), "r"(3*offset), "g"(stride), "m"(rnd) \
00383 : "memory" \
00384 ); \
00385 }
00386
00388 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_PUT, put_)
00389 MSPEL_FILTER13_8B (shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )", OP_AVG, avg_)
00390 MSPEL_FILTER13_VER_16B(shift1, "0(%1,%4 )", "0(%1,%3,2)", "0(%1,%3 )", "0(%1 )")
00391 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_PUT, put_)
00392 MSPEL_FILTER13_HOR_16B(shift1, "2*3(%1)", "2*2(%1)", "2*1(%1)", "2*0(%1)", OP_AVG, avg_)
00393
00395 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_PUT, put_)
00396 MSPEL_FILTER13_8B (shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )", OP_AVG, avg_)
00397 MSPEL_FILTER13_VER_16B(shift3, "0(%1 )", "0(%1,%3 )", "0(%1,%3,2)", "0(%1,%4 )")
00398 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_PUT, put_)
00399 MSPEL_FILTER13_HOR_16B(shift3, "2*0(%1)", "2*1(%1)", "2*2(%1)", "2*3(%1)", OP_AVG, avg_)
00400
00401 typedef void (*vc1_mspel_mc_filter_ver_16bits)(int16_t *dst, const uint8_t *src, x86_reg src_stride, int rnd, int64_t shift);
00402 typedef void (*vc1_mspel_mc_filter_hor_16bits)(uint8_t *dst, x86_reg dst_stride, const int16_t *src, int rnd);
00403 typedef void (*vc1_mspel_mc_filter_8bits)(uint8_t *dst, const uint8_t *src, x86_reg stride, int rnd, x86_reg offset);
00404
00416 #define VC1_MSPEL_MC(OP)\
00417 static void OP ## vc1_mspel_mc(uint8_t *dst, const uint8_t *src, int stride,\
00418 int hmode, int vmode, int rnd)\
00419 {\
00420 static const vc1_mspel_mc_filter_ver_16bits vc1_put_shift_ver_16bits[] =\
00421 { NULL, vc1_put_ver_16b_shift1_mmx, vc1_put_ver_16b_shift2_mmx, vc1_put_ver_16b_shift3_mmx };\
00422 static const vc1_mspel_mc_filter_hor_16bits vc1_put_shift_hor_16bits[] =\
00423 { NULL, OP ## vc1_hor_16b_shift1_mmx, OP ## vc1_hor_16b_shift2_mmx, OP ## vc1_hor_16b_shift3_mmx };\
00424 static const vc1_mspel_mc_filter_8bits vc1_put_shift_8bits[] =\
00425 { NULL, OP ## vc1_shift1_mmx, OP ## vc1_shift2_mmx, OP ## vc1_shift3_mmx };\
00426 \
00427 __asm__ volatile(\
00428 "pxor %%mm0, %%mm0 \n\t"\
00429 ::: "memory"\
00430 );\
00431 \
00432 if (vmode) { \
00433 if (hmode) { \
00434 static const int shift_value[] = { 0, 5, 1, 5 };\
00435 int shift = (shift_value[hmode]+shift_value[vmode])>>1;\
00436 int r;\
00437 DECLARE_ALIGNED(16, int16_t, tmp)[12*8];\
00438 \
00439 r = (1<<(shift-1)) + rnd-1;\
00440 vc1_put_shift_ver_16bits[vmode](tmp, src-1, stride, r, shift);\
00441 \
00442 vc1_put_shift_hor_16bits[hmode](dst, stride, tmp+1, 64-rnd);\
00443 return;\
00444 }\
00445 else { \
00446 vc1_put_shift_8bits[vmode](dst, src, stride, 1-rnd, stride);\
00447 return;\
00448 }\
00449 }\
00450 \
00451 \
00452 vc1_put_shift_8bits[hmode](dst, src, stride, rnd, 1);\
00453 }
00454
00455 VC1_MSPEL_MC(put_)
00456 VC1_MSPEL_MC(avg_)
00457
00459 #define DECLARE_FUNCTION(a, b) \
00460 static void put_vc1_mspel_mc ## a ## b ## _mmx(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00461 put_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00462 }\
00463 static void avg_vc1_mspel_mc ## a ## b ## _mmx2(uint8_t *dst, const uint8_t *src, int stride, int rnd) { \
00464 avg_vc1_mspel_mc(dst, src, stride, a, b, rnd); \
00465 }
00466
00467 DECLARE_FUNCTION(0, 1)
00468 DECLARE_FUNCTION(0, 2)
00469 DECLARE_FUNCTION(0, 3)
00470
00471 DECLARE_FUNCTION(1, 0)
00472 DECLARE_FUNCTION(1, 1)
00473 DECLARE_FUNCTION(1, 2)
00474 DECLARE_FUNCTION(1, 3)
00475
00476 DECLARE_FUNCTION(2, 0)
00477 DECLARE_FUNCTION(2, 1)
00478 DECLARE_FUNCTION(2, 2)
00479 DECLARE_FUNCTION(2, 3)
00480
00481 DECLARE_FUNCTION(3, 0)
00482 DECLARE_FUNCTION(3, 1)
00483 DECLARE_FUNCTION(3, 2)
00484 DECLARE_FUNCTION(3, 3)
00485
00486 static void vc1_inv_trans_4x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00487 {
00488 int dc = block[0];
00489 dc = (17 * dc + 4) >> 3;
00490 dc = (17 * dc + 64) >> 7;
00491 __asm__ volatile(
00492 "movd %0, %%mm0 \n\t"
00493 "pshufw $0, %%mm0, %%mm0 \n\t"
00494 "pxor %%mm1, %%mm1 \n\t"
00495 "psubw %%mm0, %%mm1 \n\t"
00496 "packuswb %%mm0, %%mm0 \n\t"
00497 "packuswb %%mm1, %%mm1 \n\t"
00498 ::"r"(dc)
00499 );
00500 __asm__ volatile(
00501 "movd %0, %%mm2 \n\t"
00502 "movd %1, %%mm3 \n\t"
00503 "movd %2, %%mm4 \n\t"
00504 "movd %3, %%mm5 \n\t"
00505 "paddusb %%mm0, %%mm2 \n\t"
00506 "paddusb %%mm0, %%mm3 \n\t"
00507 "paddusb %%mm0, %%mm4 \n\t"
00508 "paddusb %%mm0, %%mm5 \n\t"
00509 "psubusb %%mm1, %%mm2 \n\t"
00510 "psubusb %%mm1, %%mm3 \n\t"
00511 "psubusb %%mm1, %%mm4 \n\t"
00512 "psubusb %%mm1, %%mm5 \n\t"
00513 "movd %%mm2, %0 \n\t"
00514 "movd %%mm3, %1 \n\t"
00515 "movd %%mm4, %2 \n\t"
00516 "movd %%mm5, %3 \n\t"
00517 :"+m"(*(uint32_t*)(dest+0*linesize)),
00518 "+m"(*(uint32_t*)(dest+1*linesize)),
00519 "+m"(*(uint32_t*)(dest+2*linesize)),
00520 "+m"(*(uint32_t*)(dest+3*linesize))
00521 );
00522 }
00523
00524 static void vc1_inv_trans_4x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00525 {
00526 int dc = block[0];
00527 dc = (17 * dc + 4) >> 3;
00528 dc = (12 * dc + 64) >> 7;
00529 __asm__ volatile(
00530 "movd %0, %%mm0 \n\t"
00531 "pshufw $0, %%mm0, %%mm0 \n\t"
00532 "pxor %%mm1, %%mm1 \n\t"
00533 "psubw %%mm0, %%mm1 \n\t"
00534 "packuswb %%mm0, %%mm0 \n\t"
00535 "packuswb %%mm1, %%mm1 \n\t"
00536 ::"r"(dc)
00537 );
00538 __asm__ volatile(
00539 "movd %0, %%mm2 \n\t"
00540 "movd %1, %%mm3 \n\t"
00541 "movd %2, %%mm4 \n\t"
00542 "movd %3, %%mm5 \n\t"
00543 "paddusb %%mm0, %%mm2 \n\t"
00544 "paddusb %%mm0, %%mm3 \n\t"
00545 "paddusb %%mm0, %%mm4 \n\t"
00546 "paddusb %%mm0, %%mm5 \n\t"
00547 "psubusb %%mm1, %%mm2 \n\t"
00548 "psubusb %%mm1, %%mm3 \n\t"
00549 "psubusb %%mm1, %%mm4 \n\t"
00550 "psubusb %%mm1, %%mm5 \n\t"
00551 "movd %%mm2, %0 \n\t"
00552 "movd %%mm3, %1 \n\t"
00553 "movd %%mm4, %2 \n\t"
00554 "movd %%mm5, %3 \n\t"
00555 :"+m"(*(uint32_t*)(dest+0*linesize)),
00556 "+m"(*(uint32_t*)(dest+1*linesize)),
00557 "+m"(*(uint32_t*)(dest+2*linesize)),
00558 "+m"(*(uint32_t*)(dest+3*linesize))
00559 );
00560 dest += 4*linesize;
00561 __asm__ volatile(
00562 "movd %0, %%mm2 \n\t"
00563 "movd %1, %%mm3 \n\t"
00564 "movd %2, %%mm4 \n\t"
00565 "movd %3, %%mm5 \n\t"
00566 "paddusb %%mm0, %%mm2 \n\t"
00567 "paddusb %%mm0, %%mm3 \n\t"
00568 "paddusb %%mm0, %%mm4 \n\t"
00569 "paddusb %%mm0, %%mm5 \n\t"
00570 "psubusb %%mm1, %%mm2 \n\t"
00571 "psubusb %%mm1, %%mm3 \n\t"
00572 "psubusb %%mm1, %%mm4 \n\t"
00573 "psubusb %%mm1, %%mm5 \n\t"
00574 "movd %%mm2, %0 \n\t"
00575 "movd %%mm3, %1 \n\t"
00576 "movd %%mm4, %2 \n\t"
00577 "movd %%mm5, %3 \n\t"
00578 :"+m"(*(uint32_t*)(dest+0*linesize)),
00579 "+m"(*(uint32_t*)(dest+1*linesize)),
00580 "+m"(*(uint32_t*)(dest+2*linesize)),
00581 "+m"(*(uint32_t*)(dest+3*linesize))
00582 );
00583 }
00584
00585 static void vc1_inv_trans_8x4_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00586 {
00587 int dc = block[0];
00588 dc = ( 3 * dc + 1) >> 1;
00589 dc = (17 * dc + 64) >> 7;
00590 __asm__ volatile(
00591 "movd %0, %%mm0 \n\t"
00592 "pshufw $0, %%mm0, %%mm0 \n\t"
00593 "pxor %%mm1, %%mm1 \n\t"
00594 "psubw %%mm0, %%mm1 \n\t"
00595 "packuswb %%mm0, %%mm0 \n\t"
00596 "packuswb %%mm1, %%mm1 \n\t"
00597 ::"r"(dc)
00598 );
00599 __asm__ volatile(
00600 "movq %0, %%mm2 \n\t"
00601 "movq %1, %%mm3 \n\t"
00602 "movq %2, %%mm4 \n\t"
00603 "movq %3, %%mm5 \n\t"
00604 "paddusb %%mm0, %%mm2 \n\t"
00605 "paddusb %%mm0, %%mm3 \n\t"
00606 "paddusb %%mm0, %%mm4 \n\t"
00607 "paddusb %%mm0, %%mm5 \n\t"
00608 "psubusb %%mm1, %%mm2 \n\t"
00609 "psubusb %%mm1, %%mm3 \n\t"
00610 "psubusb %%mm1, %%mm4 \n\t"
00611 "psubusb %%mm1, %%mm5 \n\t"
00612 "movq %%mm2, %0 \n\t"
00613 "movq %%mm3, %1 \n\t"
00614 "movq %%mm4, %2 \n\t"
00615 "movq %%mm5, %3 \n\t"
00616 :"+m"(*(uint32_t*)(dest+0*linesize)),
00617 "+m"(*(uint32_t*)(dest+1*linesize)),
00618 "+m"(*(uint32_t*)(dest+2*linesize)),
00619 "+m"(*(uint32_t*)(dest+3*linesize))
00620 );
00621 }
00622
00623 static void vc1_inv_trans_8x8_dc_mmx2(uint8_t *dest, int linesize, DCTELEM *block)
00624 {
00625 int dc = block[0];
00626 dc = (3 * dc + 1) >> 1;
00627 dc = (3 * dc + 16) >> 5;
00628 __asm__ volatile(
00629 "movd %0, %%mm0 \n\t"
00630 "pshufw $0, %%mm0, %%mm0 \n\t"
00631 "pxor %%mm1, %%mm1 \n\t"
00632 "psubw %%mm0, %%mm1 \n\t"
00633 "packuswb %%mm0, %%mm0 \n\t"
00634 "packuswb %%mm1, %%mm1 \n\t"
00635 ::"r"(dc)
00636 );
00637 __asm__ volatile(
00638 "movq %0, %%mm2 \n\t"
00639 "movq %1, %%mm3 \n\t"
00640 "movq %2, %%mm4 \n\t"
00641 "movq %3, %%mm5 \n\t"
00642 "paddusb %%mm0, %%mm2 \n\t"
00643 "paddusb %%mm0, %%mm3 \n\t"
00644 "paddusb %%mm0, %%mm4 \n\t"
00645 "paddusb %%mm0, %%mm5 \n\t"
00646 "psubusb %%mm1, %%mm2 \n\t"
00647 "psubusb %%mm1, %%mm3 \n\t"
00648 "psubusb %%mm1, %%mm4 \n\t"
00649 "psubusb %%mm1, %%mm5 \n\t"
00650 "movq %%mm2, %0 \n\t"
00651 "movq %%mm3, %1 \n\t"
00652 "movq %%mm4, %2 \n\t"
00653 "movq %%mm5, %3 \n\t"
00654 :"+m"(*(uint32_t*)(dest+0*linesize)),
00655 "+m"(*(uint32_t*)(dest+1*linesize)),
00656 "+m"(*(uint32_t*)(dest+2*linesize)),
00657 "+m"(*(uint32_t*)(dest+3*linesize))
00658 );
00659 dest += 4*linesize;
00660 __asm__ volatile(
00661 "movq %0, %%mm2 \n\t"
00662 "movq %1, %%mm3 \n\t"
00663 "movq %2, %%mm4 \n\t"
00664 "movq %3, %%mm5 \n\t"
00665 "paddusb %%mm0, %%mm2 \n\t"
00666 "paddusb %%mm0, %%mm3 \n\t"
00667 "paddusb %%mm0, %%mm4 \n\t"
00668 "paddusb %%mm0, %%mm5 \n\t"
00669 "psubusb %%mm1, %%mm2 \n\t"
00670 "psubusb %%mm1, %%mm3 \n\t"
00671 "psubusb %%mm1, %%mm4 \n\t"
00672 "psubusb %%mm1, %%mm5 \n\t"
00673 "movq %%mm2, %0 \n\t"
00674 "movq %%mm3, %1 \n\t"
00675 "movq %%mm4, %2 \n\t"
00676 "movq %%mm5, %3 \n\t"
00677 :"+m"(*(uint32_t*)(dest+0*linesize)),
00678 "+m"(*(uint32_t*)(dest+1*linesize)),
00679 "+m"(*(uint32_t*)(dest+2*linesize)),
00680 "+m"(*(uint32_t*)(dest+3*linesize))
00681 );
00682 }
00683
00684 #define LOOP_FILTER(EXT) \
00685 void ff_vc1_v_loop_filter4_ ## EXT(uint8_t *src, int stride, int pq); \
00686 void ff_vc1_h_loop_filter4_ ## EXT(uint8_t *src, int stride, int pq); \
00687 void ff_vc1_v_loop_filter8_ ## EXT(uint8_t *src, int stride, int pq); \
00688 void ff_vc1_h_loop_filter8_ ## EXT(uint8_t *src, int stride, int pq); \
00689 \
00690 static void vc1_v_loop_filter16_ ## EXT(uint8_t *src, int stride, int pq) \
00691 { \
00692 ff_vc1_v_loop_filter8_ ## EXT(src, stride, pq); \
00693 ff_vc1_v_loop_filter8_ ## EXT(src+8, stride, pq); \
00694 } \
00695 \
00696 static void vc1_h_loop_filter16_ ## EXT(uint8_t *src, int stride, int pq) \
00697 { \
00698 ff_vc1_h_loop_filter8_ ## EXT(src, stride, pq); \
00699 ff_vc1_h_loop_filter8_ ## EXT(src+8*stride, stride, pq); \
00700 }
00701
00702 #if HAVE_YASM
00703 LOOP_FILTER(mmx)
00704 LOOP_FILTER(mmx2)
00705 LOOP_FILTER(sse2)
00706 LOOP_FILTER(ssse3)
00707
00708 void ff_vc1_h_loop_filter8_sse4(uint8_t *src, int stride, int pq);
00709
00710 static void vc1_h_loop_filter16_sse4(uint8_t *src, int stride, int pq)
00711 {
00712 ff_vc1_h_loop_filter8_sse4(src, stride, pq);
00713 ff_vc1_h_loop_filter8_sse4(src+8*stride, stride, pq);
00714 }
00715 #endif
00716
00717 void ff_vc1dsp_init_mmx(DSPContext* dsp, AVCodecContext *avctx) {
00718 int mm_flags = av_get_cpu_flags();
00719
00720 dsp->put_vc1_mspel_pixels_tab[ 0] = ff_put_vc1_mspel_mc00_mmx;
00721 dsp->put_vc1_mspel_pixels_tab[ 4] = put_vc1_mspel_mc01_mmx;
00722 dsp->put_vc1_mspel_pixels_tab[ 8] = put_vc1_mspel_mc02_mmx;
00723 dsp->put_vc1_mspel_pixels_tab[12] = put_vc1_mspel_mc03_mmx;
00724
00725 dsp->put_vc1_mspel_pixels_tab[ 1] = put_vc1_mspel_mc10_mmx;
00726 dsp->put_vc1_mspel_pixels_tab[ 5] = put_vc1_mspel_mc11_mmx;
00727 dsp->put_vc1_mspel_pixels_tab[ 9] = put_vc1_mspel_mc12_mmx;
00728 dsp->put_vc1_mspel_pixels_tab[13] = put_vc1_mspel_mc13_mmx;
00729
00730 dsp->put_vc1_mspel_pixels_tab[ 2] = put_vc1_mspel_mc20_mmx;
00731 dsp->put_vc1_mspel_pixels_tab[ 6] = put_vc1_mspel_mc21_mmx;
00732 dsp->put_vc1_mspel_pixels_tab[10] = put_vc1_mspel_mc22_mmx;
00733 dsp->put_vc1_mspel_pixels_tab[14] = put_vc1_mspel_mc23_mmx;
00734
00735 dsp->put_vc1_mspel_pixels_tab[ 3] = put_vc1_mspel_mc30_mmx;
00736 dsp->put_vc1_mspel_pixels_tab[ 7] = put_vc1_mspel_mc31_mmx;
00737 dsp->put_vc1_mspel_pixels_tab[11] = put_vc1_mspel_mc32_mmx;
00738 dsp->put_vc1_mspel_pixels_tab[15] = put_vc1_mspel_mc33_mmx;
00739
00740 if (mm_flags & AV_CPU_FLAG_MMX2){
00741 dsp->avg_vc1_mspel_pixels_tab[ 0] = ff_avg_vc1_mspel_mc00_mmx2;
00742 dsp->avg_vc1_mspel_pixels_tab[ 4] = avg_vc1_mspel_mc01_mmx2;
00743 dsp->avg_vc1_mspel_pixels_tab[ 8] = avg_vc1_mspel_mc02_mmx2;
00744 dsp->avg_vc1_mspel_pixels_tab[12] = avg_vc1_mspel_mc03_mmx2;
00745
00746 dsp->avg_vc1_mspel_pixels_tab[ 1] = avg_vc1_mspel_mc10_mmx2;
00747 dsp->avg_vc1_mspel_pixels_tab[ 5] = avg_vc1_mspel_mc11_mmx2;
00748 dsp->avg_vc1_mspel_pixels_tab[ 9] = avg_vc1_mspel_mc12_mmx2;
00749 dsp->avg_vc1_mspel_pixels_tab[13] = avg_vc1_mspel_mc13_mmx2;
00750
00751 dsp->avg_vc1_mspel_pixels_tab[ 2] = avg_vc1_mspel_mc20_mmx2;
00752 dsp->avg_vc1_mspel_pixels_tab[ 6] = avg_vc1_mspel_mc21_mmx2;
00753 dsp->avg_vc1_mspel_pixels_tab[10] = avg_vc1_mspel_mc22_mmx2;
00754 dsp->avg_vc1_mspel_pixels_tab[14] = avg_vc1_mspel_mc23_mmx2;
00755
00756 dsp->avg_vc1_mspel_pixels_tab[ 3] = avg_vc1_mspel_mc30_mmx2;
00757 dsp->avg_vc1_mspel_pixels_tab[ 7] = avg_vc1_mspel_mc31_mmx2;
00758 dsp->avg_vc1_mspel_pixels_tab[11] = avg_vc1_mspel_mc32_mmx2;
00759 dsp->avg_vc1_mspel_pixels_tab[15] = avg_vc1_mspel_mc33_mmx2;
00760
00761 dsp->vc1_inv_trans_8x8_dc = vc1_inv_trans_8x8_dc_mmx2;
00762 dsp->vc1_inv_trans_4x8_dc = vc1_inv_trans_4x8_dc_mmx2;
00763 dsp->vc1_inv_trans_8x4_dc = vc1_inv_trans_8x4_dc_mmx2;
00764 dsp->vc1_inv_trans_4x4_dc = vc1_inv_trans_4x4_dc_mmx2;
00765 }
00766
00767 #define ASSIGN_LF(EXT) \
00768 dsp->vc1_v_loop_filter4 = ff_vc1_v_loop_filter4_ ## EXT; \
00769 dsp->vc1_h_loop_filter4 = ff_vc1_h_loop_filter4_ ## EXT; \
00770 dsp->vc1_v_loop_filter8 = ff_vc1_v_loop_filter8_ ## EXT; \
00771 dsp->vc1_h_loop_filter8 = ff_vc1_h_loop_filter8_ ## EXT; \
00772 dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_ ## EXT; \
00773 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_ ## EXT
00774
00775 #if HAVE_YASM
00776 if (mm_flags & AV_CPU_FLAG_MMX) {
00777 ASSIGN_LF(mmx);
00778 }
00779 return;
00780 if (mm_flags & AV_CPU_FLAG_MMX2) {
00781 ASSIGN_LF(mmx2);
00782 }
00783 if (mm_flags & AV_CPU_FLAG_SSE2) {
00784 dsp->vc1_v_loop_filter8 = ff_vc1_v_loop_filter8_sse2;
00785 dsp->vc1_h_loop_filter8 = ff_vc1_h_loop_filter8_sse2;
00786 dsp->vc1_v_loop_filter16 = vc1_v_loop_filter16_sse2;
00787 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_sse2;
00788 }
00789 if (mm_flags & AV_CPU_FLAG_SSSE3) {
00790 ASSIGN_LF(ssse3);
00791 }
00792 if (mm_flags & AV_CPU_FLAG_SSE4) {
00793 dsp->vc1_h_loop_filter8 = ff_vc1_h_loop_filter8_sse4;
00794 dsp->vc1_h_loop_filter16 = vc1_h_loop_filter16_sse4;
00795 }
00796 #endif
00797 }